The AVISI Group

Welcome to the AVISI group website.


The AVISI group is a research group based in the School of Computer Science, at the University of St Andrews that focuses on Architecture Virtualisation and Simulation technologies, and related concerns.

We’re interested in:

  • Hardware Virtualisation
  • Instruction Set Simulation
  • Operating Systems
  • Just-in-time Compilation
  • Dynamic Binary Translation

We love collaborating with other institutes - academic, or industrial! If you’re interested in working with us, please get in touch.


Recent Publications

Risotto: A Dynamic Binary Translator for Weak Memory Model Architectures

In proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems

Dynamic Binary Translation (DBT) is a powerful approach to support cross-architecture emulation of unmodified binaries. However, DBT systems face correctness and performance challenges, when emulating concurrent binaries from strong to weak memory consistency architectures. As a matter of fact, we report several translation errors in Qemu, when emulating x86 binaries on Arm hosts. To address these challenges, we propose an end-to-end approach that provides correct and efficient emulation for weak memory model architectures.

Jan 1 2023 Redha Gouicem Dennis Sprokholt Jasper Ruehl Rodrigo C. O. Rocha Tom Spink Soham Chakraborty Pramod Bhatotia

Leaps and bounds: Analysing WebAssembly’s performance with a focus on bounds checking

In Proceedings of the 2022 IEEE International Symposium on Workload Characterization

WebAssembly is gaining more and more popularity, finding applications beyond the Web browser – for which it was initially designed for. However, its performance, which developers aimed at being comparable to native, requires further tuning and hasn’t being studied extensively to pinpoint the cause of overheads. This paper identifies that WebAssembly unique safety mechanisms, one of the major ones being bounds-checked memory accesses, may introduce up to 650% overhead. Therefore, we evaluate four popular WebAssembly runtimes against native compiled code.

Nov 8 2022 Raven Szewczyk Kim Stonehouse Antonio Barbalace Tom Spink

Lasagne: A Static Binary Translator for Weak Memory Model Architectures

In proceedings of the 43rd ACM SIGPLAN Conference on Programming Language Design and Implementation

The emergence of new architectures create a recurring challenge to ensure that existing programs still work on them. Manually porting legacy code is often impractical. Static binary translation (SBT) is a process where a program’s binary is automatically translated from one architecture to another, while preserving their original semantics. However, these SBT tools have limited support to various advanced architectural features. Importantly, they are currently unable to translate concurrent binaries. The main challenge arises from the mismatches of the memory consistency model specified by the different architectures, especially when porting existing binaries to a weak memory model architecture.

Jun 13 2022 Rodrigo C. O. Rocha Dennis Sprokholt Martin Fink Redha Gouicem Tom Spink Soham Chakraborty Pramod Bhatotia